Authentication and Obfuscation of Integrated Circuits

Authentication and Obfuscation of Integrated Circuits
Disertante: Dr. Keshab K. Parhi

Lugar: Aula Magna - Primer Piso Edificio Central - UTN

Fecha: Miércoles 08/05/2019 (18:00hs)

Idioma: Ingles

Certificado: Participación

- Dirigido a profesionales, estudiantes, docentes en ingeniería electrónica, telecomunicaciones y carreras relacionadas.

The problem of hardware security is a serious concern that has led to a lot of work on hardware prevention of piracy and intellectual property (IP), which can be broadly classified into two main categories: 1) authentication-based approach, or 2) obfuscation-based approach. The authentication-based approaches include physical unclonable functions (PUFs) based authentication, digital watermarking, keylocking and hardware metering . Obfuscation-based approach is a technique that transforms an application or a design into one that is functionally equivalent to the original but is significantly more difficult to reverse engineer. Some hardware protection methods are achieved by altering the human readability of the hardware description language (HDL) code, or by encrypting the source code based on cryptographic techniques . Recently, a number of hardware protection schemes have been proposed that modify the finite-state machine (FSM) representations to obfuscate the circuits. This tutorial will cover this issue and the topic of PUFs (Physical unclonable functions) which can store secret keys in integrated circuits (ICs) by exploiting the uncontrollable randomness due to manufacturing process variations. These PUFs can be used for authentication of devices and for key generation in security applications.

- Keshab K. Parhi (Ph.D). He has been with the University of Minnesota, Minneapolis, since 1988, where he is 
currently Distinguished McKnight University Professor and Edgar F. Johnson Professor of Electronic Communication 
in the Department of Electrical and Computer Engineering. He has published over 600 papers, is the inventor of 29 patents, 
and has authored the textbook VLSI Digital Signal Processing Systems (Wiley, 1999) and co-edited the reference book 
Digital Signal Processing for Multimedia Systems (Marcel Dekker, 1999). His current research addresses VLSI architecture 
design of machine learning systems, hardware security, data-driven neuroscience and molecular/DNA computing. 
Dr. Parhi is the recipient of numerous awards including the 2017 Mac Van Valkenburg award and the 2012 Charles A. Desoer 
Technical Achievement award from the IEEE Circuits and Systems Society, the 2004 F. E. Terman award from the American 
Society of Engineering Education, the 2003 IEEE Kiyo Tomiyasu Technical Field Award, the 2001 IEEE W. R. G. Baker prize 
paper award, and a Golden Jubilee medal from the IEEE Circuits and Systems Society in 2000. He served as the 
Editor-in-Chief of the IEEE Trans. Circuits and Systems, Part-I during 2004 and 2005. He was elected a Fellow of IEEE in 
1996 and a Fellow of the American Association for Advancement of Science (AAAS) in 2017.


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